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AUSCERT External Security Bulletin Redistribution
Special Register Buffer Data Sampling Advisory
10 June 2020
AusCERT Security Bulletin Summary
Product: Intel CPUs
Operating System: Windows
UNIX variants (UNIX, Linux, OSX)
Impact/Access: Access Privileged Data -- Existing Account
CVE Names: CVE-2020-0543
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Public Security Advisory
Intel Product Security Incident Response Team (PSIRT)
Title: Special Register Buffer Data Sampling Advisory
Intel ID: INTEL-SA-00320
Advisory Category: Hardware
Impact of vulnerability: Information Disclosure
A potential security vulnerability in some IntelÂ® Processors may allow information disclosure.
Intel is releasing firmware updates to mitigate this potential vulnerability.
Description: Incomplete cleanup from specific special register read operations in some Intel(R)
Processors may allow an authenticated user to potentially enable information disclosure via
CVSS Base Score: 6.5 Medium
CVSS Vector: CVSS:3.1/AV:L/AC:L/PR:L/UI:N/S:C/C:H/I:N/A:N
A list of impacted products can be found here.
Intel has released microcode updates for the affected processors that are currently supported.
Updates are available on the public github repository.
GitHub*: Public Github: https://github.com/intel/Intel-Linux-Processor-Microcode-Data-Files
GitHub* MCU Repository training is available on RDC at this location:
To obtain access to Intel's GitHub* OTCShare:
1) Create a GitHub* account at https://github.com. Your account must include your company
email address as your primary email address.
2) Email your request to firstname.lastname@example.org with the following information:
b. Email address
c. Company name
d. Github user ID
3) Requests typically take 1-2 business days to process. An invitation to the OTCShare
organization will be emailed to the primary email address registered with your GitHub
account. Alternately, you may accept the invitation here: https://github.com/otcshare.
4) After you have accepted the OTCShare invite, you will be added to the MCU repository
within 1-2 business days.
The microcode updates also provide an opt-out mechanism (RNGDS_MITG_DIS) to disable the
mitigation for RDRAND and RDSEED instructions executed outside of IntelÂ® Software Guard
Extensions (IntelÂ® SGX) enclaves. Please refer to technical details to find additional
information on the opt-out mechanism here.
Note that inside of an Intel SGX enclave, the mitigation is applied regardless of the value of
Additional technical details about SRBDS can be found here .
Intel is conduction an SGX TCB recovery in Q3 2020. Refer to IntelÂ® SGX Attestation Technical
Details for more information.
Intel would like to thank Alyssa Milburn, Hany Ragab, Kaveh Razavi, Herbert Bos, Cristiano
Giuffrida for reporting this issue.
Intel, and nearly the entire technology industry, follows a disclosure practice called
Coordinated Disclosure, under which a cybersecurity vulnerability is generally publicly
disclosed only after mitigations are available.
Description: Initial Release
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